Synopsys Delivers Industry’s First Integrity and Data Encryption Security IP Modules for PCI Express 5.0 and Compute Express Link 2.0 Specifications

Synopsys Delivers

DesignWare IDE Security IP Modules Protect Against Data Tampering and Physical Attacks in High-Performance Cloud Computing SoCs


  • DesignWare Integrity and Data Encryption Security Modules protect data transfers for SoCs using the PCI Express® 5.0 or CXL™ 2.0 architectures
  • Pre-verified with DesignWare Controller IP for PCI Express technology and CXL enables fast integration and lowers risk
  • Efficient encryption/decryption and authentication with AES-GCM helps ensure data confidentiality and integrity for high-performance systems

Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the DesignWare® Integrity and Data Encryption (IDE) Security Modules to help designers protect against data tampering and physical attacks in high-performance computing (HPC) SoCs using the PCI Express® (PCIe®) 5.0 architecture or Compute Express Link (CXL) 2.0 interface. The DesignWare IDE Security Modules protect sensitive data with efficient encryption, decryption, and authentication based on AES-GCM algorithms while meeting PCIe 5.0 specification and CXL 2.0 IP performance and latency requirements. The DesignWare IDE Security Modules are designed to the latest PCIe 5.0 specification and CXL 2.0 interface standards and are designed and validated with Synopsys’ DesignWare Controller IP to accelerate SoC integration.

“The IDE cryptographic features in the PCIe 5.0 specification are aligned to industry-standard design requirements and can be flexibly extended as security requirements evolve,” said Al Yanes, PCI-SIG® chairman and president. “By offering the unique combination of interface and security IP for the PCIe 5.0 specification, Synopsys is enabling the design community to quickly implement necessary security functionality into their systems.”

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“Security is a cornerstone for the success of any technology, and adding IDE security functionality to the CXL 2.0 specification supports the creation of a more secure ecosystem,” said Jim Pappas, chairman at CXL Consortium. “We’re pleased to have Synopsys’ support as a member of the CXL Consortium to help enable designers integrate security functionality into advanced cloud and HPC systems.”

“With the tremendous Internet traffic growth in hyperscale cloud data centers, security is becoming essential to protecting the data transfer in these systems,” said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. “The combination of Synopsys’ innovative DesignWare IDE Security IP Modules with our DesignWare Controllers for PCIe 5.0 technology and CXL 2.0, enables designers to integrate standards-compliant security functionality at the chip level in high-performance cloud computing systems with significantly less risk.”